Division-based versus general decomposition-based multiple-level logic synthesis

During the last decade, many different approaches have been proposed to solve the multiple-level synthesis problem with different minimum functionally complete systems of primitive logic blocks. The most popular of them is the division-based approach. However, modem microelectronic technology provides a large variety of building blocks which considerably differ from those typically considered. The traditional methods are therefore not suitable for synthesis with many modem building blocks. Furthermore, they often fail to find global optima for complex designs and leave unconsidered some important design aspects. Some of their weaknesses can be eliminated without leaving the paradigm they are based on, other ones are more fundamental. A paradigm which enables efficient exploitation of the opportunities created by the microelectronic technology is the general decomposition paradigm. The aim of this paper is to analyze and compare the general decomposition approach and the division-based approach. The most important advantages of the general decomposition approach are its generality (any network of any building blocks can be considered) and totality (all important design aspects can be considered) as well as handling the incompletely specified functions in a natural way. In many cases, the general decomposition approach gives much better results than the traditional approaches

Implementation of mutual exclusion in VHDL

In VHDL it is difficult to implement mutual exclusion at an abstract level since atomic actions are required. A local status model and an arbiter model are presented to achieve mutual exclusion in VHDL. Shared data, protected by a mutual exclusion mechanism, cannot be modelled as a simple, resolved VHDL signal since no resolution function is able to return the correct value. By changing the signal type to a special record type this problem can be solved, using the arbiter model. The specification language Task Level VHDL (TLVHDL) has been developed to specify communication and synchronization mechanisms at an abstract level. In TLVHDL the abovementioned problems are not encountered. A back end compiler converts the abstract TLVHDL description into a VHDL specification, according to a chosen mutual exclusion model. All modifications are handled by the computer and are of no concern to the designer